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find Opcode of the following 68HCS12 instruction and explain the fetch execute cycle on the basis of it

  • ASRA
  • ANDA $45

Explain the pipelined and non-pipelined execution with help of the following instruction ASRG,ADDA$FF and CMPA#$AB

Explain the addressing modes in the following 5 instructions
a- INX
b- LDAA $34
c- CMPA#$55
d- LDAA8,Y+
e- BRA $2050

Explain the following 5 instructions and write the corresponding RTL
f- INX
g- LDAA $34
h- CMPA#$55
i- LDAA8,Y+
j- BRA $2050

Explain the architecture of a microprocessor having 16 bit wide data bus and which can 16 k address of external memory